Senior digital ic designer
ZürichIC Resources
...Implement RTL for memory‑mapped control blocks, AXI/AHB/APB bridges, FIFOs/scoreboards, arbiters, DMA, and datapaths, ensuring synthesis‑friendly code with a clear reset/CDC strategy. Optimise designs for power with a power‑driven mindset and approach. Develop UVM testbenches, including agents, [...]
Kategorie Medien / Verlag / Redaktion